Antrieb 4.0
Antrieb 4.0
The goal of the research project “Antrieb 4.0” is to build a foundation for services and marketplace-applications across participants in the value chain of drive system applications utilising “Industrie 4.0” functionalities. To achieve this, plug and play capabilities as well as manufacturer-neutral interoperability of drive systems are investigated, implemented, and tested on a demonstrator plattform utilizing commercial drive systems, cloud data spaces as well as service applications. Its basic structure is shown in Figure 1. The technical requirements are derived based on market relevant usecases.
Focus of our Institute
The research activity of our institute within this project is predominantly focused on the drive system and the Edge-layer (See Fig. 1) and the construction of the drive-system hardware of the demonstrator. The demonstrator consists of distributed drive trains with commercial, as well as self-developed drive systems. According to the goals of the project communication with the drive systems will be implemented utilizing asset administration shells (AAS) via OPC UA in addition to ECLASS descriptors.
Drive System Prototype Demonstrating Time-Sensitive Networking (TSN) Capabilities
Shafy Musthafa has successfully developed a high-performance prototype drive system to showcase the capabilities of Time-Sensitive Networking (TSN). The system consists of a three-phase inverter driving a Permanent Magnet Synchronous Motor (PMSM) operated in closed-loop control, with the entire control architecture implemented on a Xilinx Zynq UltraScale+ FPGA.
The complete Field-Oriented Control (FOC) algorithm, including current, speed, and position control loops, has been designed and implemented entirely within the FPGA fabric, ensuring deterministic real-time performance with ultra-low latency.
The system interfaces with two dedicated custom PCBs:
- Measurement Card: Accurately measures DC-link voltage and phase currents from all three half-bridges using isolated sensors, with conditioned analog signals digitized and transmitted to the FPGA.
- Control Card: Provides rotor position feedback by encoding the motor’s resolver or encoder signals into digital form for the FPGA. It also converts the FPGA-generated PWM signals into optical signals for driving the power stage and converts optical fault signals from the half-bridges back into electrical signals for processing.
The prototype supports real-time monitoring and control through both UART and Ethernet interfaces. Users can send commands (e.g., reference speed, torque, or operating mode) and receive comprehensive telemetry data, including actual motor speed, DC-link voltage, Three-phase currents, Rotor mechanical and electrical angles and System status and diagnostic information.
This platform effectively demonstrates the advantages of TSN-enabled communication in industrial drive applications, offering precise synchronization, deterministic data delivery, and seamless integration of real-time control and IT networks. The successful development and demonstration of this prototype highlight advanced capabilities in high-performance motor control, FPGA-based embedded systems, and next-generation industrial Ethernet technologies.
Official website for the project Antrieb 4.0 : www.antrieb40.org
Consortium partners
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TU Darmstadt Institute for Power Electronics and Control of Drives |
Prof. Dr.-Ing. Gerd Griepentrog Dr.-Ing Michael Wolff Ivan Kliasheu, M.Sc Vadim Pribylov, M.Sc Shafy Musthafa, M.Sc |
|
TU Darmstadt Communications Networks / Multimedia Communications Lab |
Prof. Dr. Björn Scheuermann Dr. Ralf Kundel |
| FE-ZVEI | Dr. Falk Eckert |
| Fraunhofer IIS |
Prof. Dr. Tassilo Schuster Lara Schmidt |
| Fraunhofer IISB | Dr. Martin Schellenberger |